CSE-670 Survey Report: A SURVEY OF LOGIC BLOCK ARCHITECTURES FOR DIGITAL SIGNAL PROCESSING APPLICATIONS

Abstract:

The lower efficiency of FPGAs compared with custom ASICs can be improved upon if the characteristics of the target application can be exploited in the design of FPGA architecture, and in particular, an efficient logic block. The increasing use of FPGAs for a particular application domain, such as Digital Signal Processing, justifies the application domain tuning of the FPGA architecture. By trading off the general purpose nature of an FPGA with application specific optimizations, we can improve the cost, performance and power efficiencies. In this report, the various techniques used to design optimized logic blocks are presented and compared. The best suitability of each class of optimization approach is then determined with respect to the needs of different applications.