CSE-670 Term Project: Wormhole Run-Time Reconfiguration of FPGAs with Distributed Configuration Decompression

Abstract:

The Primary Goal of this project was to explore the feasibility of adapting Wormhole RTR, or a similar concept for use with conventional FPGA architectures. An Additional Goal was to further improve run-time reconfiguration performance by exploring novel approaches to Configuration Compression using Variable length Codes (for example Huffman codes), as well as exploring the possibility and potential benefits of a distributed decompression scheme. Thus we have:
• Explore Wormhole RTR for Conventional FPGAs
• Compression Schemes using Variable Length Codes
• Potential and benefits of Distributed Decompression schemes
It is important to note at this point that this study is targeted towards Data-path oriented FPGA Architectures.